TismForge/IroGB

Move towards scheduler architecture + DMA refactor #64

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AlexDorce merged 14 commits from Scheduler-architecture into develop

2026-05-01 21:41:40 +00:00

AlexDorce commented

2026-05-01 21:39:10 +00:00

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Pushing things in a direction to prepare us for JIT.

I'm introducing the SystemScheduler/ChildScheduler heirarchy which all components will eventually follow, as opposed to their previous cycle stepped model.
I've refactored OAM-DMA and VRAM-DMA to support this new scheduler-based model and improved some existing flaws that existed in the previous implementation.

Games are slightly faster as a result, and we've also improved visual artifacts across a few games. Most notable improvement is linked here: https://github.com/AlexSutila/IroGB/issues/46

Pushing things in a direction to prepare us for JIT. 1. I'm introducing the SystemScheduler/ChildScheduler heirarchy which all components will eventually follow, as opposed to their previous cycle stepped model. 2. I've refactored OAM-DMA and VRAM-DMA to support this new scheduler-based model and improved some existing flaws that existed in the previous implementation. Games are slightly faster as a result, and we've also improved visual artifacts across a few games. Most notable improvement is linked here: https://github.com/AlexSutila/IroGB/issues/46

AlexDorce added 14 commits

2026-05-01 21:39:10 +00:00

Rewrite OAM DMA with scheduler for (test coverage is unchanged for big_step) 99f8f68dc3

step and big_step now work with scheduler (double speed is prob broken) 6e8dd0c91a

Shorten size of sys w bitpacking, remove dma->step(), fix dma state debug struct 1aae5fda4b

Scheduler serialization routines, savestates seem stable 22ffe1aba9

Double speed DMA is functional (I think), but the step methods are a disaster a56424003a

Preparing for big VDMA rewrite ed7ee29c34

Very rudimentary GDMA (CPU execution doesnt stop so things get corrupted) 4bb3b30d3c

CPU pauses during DMA, we zip through the idle cycles, PK yellow looks good 404c861482

HDMA+GDMA kinda works again, but still very buggy be8e7b3765

VDMA seems much more stable now (stupid mermaid pinball is still borked) f6d26344b1

Emulate internal increment of VDMA address registers, fixes stupid mermaid pinball e3071b8491

Fix stupid awful VDMA byte transfer bug, and SDL3 debugger da24132b2a

Improve FF55 active bit, fixes DK and PK crystal (VDMA seems stable now) 98a2796960

Refactor save states for OAMDMA/VDMA

format-check / formatting (pull_request) Has been cancelled

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d2d583cc10

AlexDorce merged commit 68258429be into develop

2026-05-01 21:41:40 +00:00

AlexDorce deleted branch Scheduler-architecture

2026-05-01 21:41:40 +00:00

AlexDorce referenced this pull request from a commit

2026-05-01 21:41:40 +00:00

Merge pull request 'Move towards scheduler architecture + DMA refactor' (#64) from Scheduler-architecture into develop

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