CPU-tinkering #62

Merged

AlexDorce merged 8 commits from CPU-tinkering into develop

2026-04-22 01:10:00 +00:00

AlexDorce commented

2026-04-22 01:07:26 +00:00

Owner

So, a lot kinda happened here. I have two main motivators with this PR that will open opportunities for future optimizations:

I am moving away from using Instruction::exec() as a mechanism to gauge total clock cycle count per instruction. Instead, introducing a timing metadata struct that counts how many "important cycles" we need to emulate there are allows us to easily skip the idle cycles, for future state. We can sync other components in bulk based on the idle CPU cycles we (will eventually) skip.
I am removing the ISA templating. It is bloating the binary, and removing all of it not only allows the entire links awakening intro to run in FF mode 2 seconds faster, but also reduces the binary size by literally 50%.

TLDR: Big PR to prime us for more PRs that will open doors for insane CPU optimizations.

So, a lot kinda happened here. I have two main motivators with this PR that will open opportunities for future optimizations: 1. I am moving away from using Instruction::exec() as a mechanism to gauge total clock cycle count per instruction. Instead, introducing a timing metadata struct that counts how many "important cycles" we need to emulate there are allows us to easily skip the idle cycles, for future state. We can sync other components in bulk based on the idle CPU cycles we (will eventually) skip. 2. I am removing the ISA templating. It is bloating the binary, and removing all of it not only allows the entire links awakening intro to run in FF mode 2 seconds faster, but also reduces the binary size by literally 50%. TLDR: Big PR to prime us for more PRs that will open doors for insane CPU optimizations.

AlexDorce added 8 commits

2026-04-22 01:07:26 +00:00